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SuperLiteTM Micrel, Inc.
3.3V, 2.7Gbps DUAL 2X2 CROSSPOINT SWITCH
SY55859L SuperLiteTM SY55859L
FEATURES
s Pin-for-pin, plug-in compatible to the MAX3840 s Supply voltage operation: +3.3V 10% s Low jitter: * 2psRMS random jitter * 5psPP deterministic jitter s Power saving output disable feature s 15ps channel-to-channel skew s Fast CML outputs: <100ps tr /tf s Available in a small (5mm x 5mm) 32-pin EPADMLFTM package SuperLiteTM
DESCRIPTION
The SY55859L is a dual CML 2x2 crosspoint switch optimized for high-speed data and/or clock applications (up to 2.7Gbps or 2.7GHz) where low jitter and skew are critical. This device is pin-for-pin, plug-in compatible to the MAX3840. Each 2x2 of the SY55859L routes any input to any output, and thus can distribute or multiplex a clock or data stream. The I/O architecture is fully differential and CML compatible. Both inputs and outputs are optimized for 50 transmission lines. The inputs (DA 0-1 and DB 0-1) are internally terminated with 50, thus eliminating external termination, and the outputs (QA0-1 and QB0-1) include 50 source termination. Furthermore, a power-saving output enable feature is provided which powers-down unused outputs. The SY5859L operates from a +3.3V 10% supply, and is guaranteed over the industrial (-40C to +85C) temperature range. It is available in a 32-pin (5mm x 5mm) MLFTM package. For applications that require either lower voltage operation or a more flexible input interface (for applications such as AC-coupled LVPECL inputs), consider the SY55858U.
APPLICATIONS
s SONET/SDH optical transport s High-speed backplane redundancy s Add-drop multiplexers
CROSS REFERENCE TABLE
Micrel Semiconductor SY55859LMI Maxim MAX3840EGJ
TYPICAL APPLICATIONS CIRCUIT
TYPICAL PERFORMANCE
Data Limiting Amplifier CDR Laser Driver
Clock
SY55859L Data Limiting Amplifier CDR Laser Driver
Clock
Output Swing (60mV/div.)
TIME (50ps/div.)
2.7Gbps, 223 - 1 PRBS
SuperLite is a trademarks of Micrel, Inc. MicroLeadFrame and MLF are trademarks of Amkor Technology, Inc. M9999-110705 hbwhelp@micrel.com or (408) 955-1690
Rev.: C Amendment: /0
1
Issue Date: November 2005
Micrel, Inc.
SuperLiteTM SY55859L
PACKAGE/ORDERING INFORMATION
ENA1 /DA1 DA1 ENA0 SELA0 /DA0 DA0 SELA1
Ordering Information(1)
Part Number Package Operating Type Range H32-1 H32-1 H32-1 H32-1 Industrial Industrial Industrial Industrial Package Marking SY55859LMI SY55859LMI Lead Finish Sn-Pb Sn-Pb
GND VCC QA0 /QA0 VCC QA1 /QA1 VCC
32 31 30 29 28 27 26 25
ENB1 DB1 /DB1 ENB0 SELB0 DB0 /DB0 SELB1
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
24 23 22 21 20 19 18 17
SY55859LMI SY55859LMITR(2) SY55859LMG(3) SY55859LMGTR(2, 3)
SY55859LMG with Pb-Free Pb-Free bar-line indicator NiPdAu SY55859LMG with Pb-Free Pb-Free bar-line indicator NiPdAu
GND VCC /QB0 QB0 VCC /QB1 QB1 VCC
32-Pin EPAD-MLFTM (MLF-32)
Notes: 1. Contact factory for die availability. Dice are guaranteed at TA = 25C, DC Electricals only. 2. Tape and Reel. 3. Pb-Free package recommended for new designs.
PIN DESCRIPTION
Pin Number 1 2 3 4 5 6 7 8 9, 24 10, 13, 16, 17, 20, 23 11 12 14 15 18 19 21 22 25 26 27 28 29 30 31 32 EP Pin Name ENB1 DB1 /DB1 ENB0 SELB0 DB0 /DB0 SELB1 GND VCC /QB0 QB0 /QB1 QB1 /QA1 QA1 /QA0 QA0 SELA1 DA0 /DA0 SELA0 ENA0 DA1 /DA1 ENA1 Exposed Pad Pin Function TTL Input. Channel B1 Output Enable. Setting this pin inactive low powers down QB1 and /QB1. Do not leave floating. CML Input. Channel B1 true input. CML Input. Channel B1 complement input. TTL Input. Channel B0 Output Enable. Setting this pin inactive low powers down QB0 and /QB. Do not leave floating. TTL Input. Channel B0 output select. Please refer to Table 2. Do not leave floating. CML Input. Channel B0 true input. CML Input. Channel B0 complement input. TTL Input. Channel B1 output select. Please refer to Table 2. Do not leave floating. Supply ground. Most negative supply voltage. Positive supply. CML Output. Channel B0 complement output. CML Output. Channel B0 true output. CML Output. Channel B1 complement output. CML Output. Channel B1 true output. CML Output. Channel A1 complement output. CML Output. Channel A1 true output. CML Output. Channel A0 complement output. CML Output. Channel A0 true output. TTL Input. Channel A1 output select. Please refer to Table 1. Do not leave floating. CML Input. Channel A0 true input. CML Input. Channel A0 complement input. TTL Input. Channel A0 output select. Please refer to Table 1. Do not leave floating. TTL Input. Channel A0 output enable. Setting this pin inactive low powers down QA0 and /QA0. Do not leave floating. CML Input. Channel A1 true input. CML Input. Channel A1 complement input. TTL Input. Channel A1 output enable. Setting this pin inactive low powers down QA1 and /QA1. Do not leave floating. Ground. This must be soldered to circuit board ground for proper electrical and thermal operation. 2
M9999-110705 hbwhelp@micrel.com or (408) 955-1690
Micrel, Inc.
SuperLiteTM SY55859L
Absolute Maximum Ratings(Note 1)
Supply Voltage (VCC) .................................. -0.5V to +6.0V CML Input Voltage (VIN) .............................. -0.5V to +6.0V TTL Control Input Voltage (VIN) ........... -0.5V to VCC +0.5V CML Output Voltage (VOUT) ......... VCC -1.0V to VCC +0.5V CML Output Current (IOUT) ........................................ 22mA Lead Temperature (soldering, 20sec.) .................... +260C Storage Temperature (TS) ....................... -65C to +150C
Operating Ratings(Note 2)
Supply Voltage (VCC) .................................. +3.0V to +3.6V Ambient Temperature (TA) ......................... -40C to +85C Junction Temperature (TJ) ........................................ 160C Package Thermal Resistance MLFTM (JA) still-air .............................................................. 28C/W 500lfpm ............................................................ 20C/W MLFTM (JC) ........................................................... 4C/W
DC ELECTRICAL CHARACTERISTICS
TA = -40C to +85C Symbol VCC ICC Parameter Power Supply Voltage Power Supply Current No Load, Over Supply Voltage; All Outputs Enabled Condition Min 3.0 Typ 3.3 160 Max 3.6 190 Units V mA
CML DC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V; GND = 0V; TA = -40C to +85C(Note 3) Symbol VOUT ROUT VOCM VIS VDIFF Parameter CML Differential Output Swing Differential Output Impedance CML Output Common Mode Voltage CML Input Voltage Range CML Differential Input Voltage Swing CML Single-ended Input Impedance Condition RL = 50 to VCC, Figure 3 Figure 2 RL = 50 to VCC, Figure 3 Figure 4 Figure 5 Figure 1 VCC-0.8 300 42.5 50 Min 640 85 Typ 800 100 VCC-0.2 VCC+0.4 1600 57.5 Max 1000 115 Units mVPP V V mVPP
TTL CONTROL ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V; GND = 0V; TA = -40C to +85C(Note 3) Symbol VIH VIL IIH IIL
Note 1.
Parameter TTL Input HIGH Voltage TTL Input LOW Voltage TTL Input HIGH Current TTL Input LOW Current
Condition
Min 2.0
Typ
Max
Units V
0.8 -10 -10 +10 +10
V A A
Permanent device damage may occur if absolute maximum ratings are exceeded. This is a stress rating only and functional operation is not implied at conditions other than those detailed in the operational sections of this data sheet. Exposure to absolute maximum ratlng conditions for extended periods may affect device reliability. The data sheet limits are not guaranteed if the device is operated beyond the operating ratings. The device is guaranteed to meet the DC specifications, shown in the table above, after thermal equilibrium has been established. The device is tested in a socket such that transverse airflow of 500lfpm is maintained.
Note 2. Note 3.
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Micrel, Inc.
SuperLiteTM SY55859L
AC ELECTRICAL CHARACTERISTICS
VCC = 3.0V to 3.6V; GND = 0V; TA = -40C to +85C(Note 1) Symbol fMAX fMAX tPD RJ DJ tSKDIFF tSKEW tr,tf
Note 1. Note 2. Note 3. Note 4.
Parameter Maximum NRZ Data Rate Maximum Clock Rate Propagation Delay from Input-to-Output Random Jitter Deterministic Jitter CML Output Differential Skew CML Output Channel-to-Channel CML Output Rise/Fall Times
Condition
Min
Typ 2.7 2.7 275
Max
Units Gbps GHz ps psRMS
Note 2 Note 3 Any Differential Pair - Duty Cycle Distortion Note 4, Any Two Outputs (20% to 80%)
2 5 7 15 80 20 25 40 135
psPP
ps ps ps
AC characteristics are guaranteed by design and characterization. Tested using environment of Figure 6, 50 equivalent load. Measured with 100mVp-p noise (f 2MHz) on the power supply. Deterministic jitter (DJ) is the arithmetic sum of pattern-dependent jitter and pulse width distortion. This represents the skew on a QA and QB output with their inputs receiving the same signal.
TYPICAL OPERATING CHARACTERISTICS
Channel-to-Channel Skew Histogram
500 SUPPLY CURRENT (mA) 400 300 200 100 0 -30 180 160 140 120 100 80 60 40 20
Supply Current vs. Temperature
4 Outputs Enabled 3 Outputs Enabled 2 Outputs Enabled 1 Output Enabled No Outputs Enabled
-20
-10 0 10 SKEW (ps)
20
30
0 -40 -20 0 20 40 60 TEMPERATURE (C)
80
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Micrel, Inc.
SuperLiteTM SY55859L
TYPICAL OPERATING CHARACTERISTICS
VCC
D 50 1.2mA
VIS(max) Valid
Invalid D, /D Inputs
50 /D 1.2mA SY55859L
VIS(min) Invalid
Figure 4. Input Range
Figure 1. Input Structure
vcc
D VDIFF 2
50
50 Q /Q
/D
Figure 5a. Input Levels
16mA
|D - /D|
SY55859L
VDIFF
Figure 2. Output Structure
Q VOUT 2 VOCM /Q 0V
Figure 5b. Input Levels
Q
50 100
Figure 3a. Output Levels
/Q 50
|Q -- /Q|
VOUT
SY55859L
Figure 3b. Output Levels
Figure 6. Output Interface
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Micrel, Inc.
SuperLiteTM SY55859L
FUNCTIONAL DESCRIPTION
SY55859L is a dual cross point with excellent pin-to-pin and part-to-part skew matching. As shown in table 1, based on the logic value at TTL input SELA0, output QA0 replicates either input DA0 or DA1. TTL input SELA1 selects whether output QA1 replicates input DA0 or DA1. As shown in table 2, TTL inputs SELB0 and SELB1 perform similarly for outputs QB0 and QB1 respectively, choosing between inputs DB0 or DB1. If the two control inputs are tied together, SY55859L behaves as a redundant distribution device. Depending on the state of the combined control inputs, QA0 and QA1 will both replicate either DA0 or DA1. If the two control inputs are made the logical complement of each other, the SY55859L functions as a crosspoint, either sending DA0 to QA0 and DA1 to QA1, or sending DA0 to QA1 and DA1 to QA0. The same applies to channel B. SY85859L's CML outputs are source terminated to 50 individually, 100 differentially. The CML inputs are parallel terminated, also to 50. This improves signal integrity. With all terminations on chip, high-speed interfacing is greatly simplified, eliminating the need for external termination passive components. Figures 1 and 2 show the input and output structures.
SELA0 0 0 1 1 CTL CTL
SELA1 0 1 0 1 CTL /CTL
QA0 DA0 DA0 DA1 DA1 Same Opposite
QA1 DA0 DA1 DA0 DA1 Same Opposite
Function Fanout Buffer Dual Buffer Dual Buffer Fanout Buffer Redundant Distribution Crosspoint
Table 1. Input to Output Connectivity, Crosspoint A
SELB0 0 0 1 1 CTL CTL
SELB1 0 1 0 1 CTL /CTL
QB0 DA0 DA0 DA1 DA1 Same Opposite
QB1 DA0 DA1 DA0 DA1 Same Opposite
Function Fanout Buffer Dual Buffer Dual Buffer Fanout Buffer Redundant Distribution Crosspoint
Table 2. Input to Output Connectivity, Crosspoint B
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Micrel, Inc.
SuperLiteTM SY55859L
FUNCTIONAL BLOCK DIAGRAM
DA0 0 /DA0 1 SELA0 A0 CML /QA0 QA0
0 DA1 1 /DA1 A1 CML
QA1
/QA1
SELA1
DB0 0 /DB0 1 SELB0 B0 CML /QB0 QB0
0 DB1 1 /DB1 B1 CML
QB1
/QB1
SELB1
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Micrel, Inc.
SuperLiteTM SY55859L
APPLICATIONS INFORMATION
The eight TTL compliant inputs to SY55859L are ENA0, ENA1, ENB0 ENB1, SELA0, SELA1, SELB0 and SELB1. These high impedance inputs do not default to a stable logic state when left unconnected. Therefore, these TTL compliant inputs cannot be left floating. Connect these inputs to a valid control signal, or hardwire to VCC or GND. The four enable TTL inputs, when driven low, disable the corresponding output stage. This reduces power consumption. Disabled output stages do not go into a high impedance state. Rather, each pin of a disabled output stage pair goes high through its respective 50 source termination. The delay from a logic transition on an enable input to the corresponding effect on the CML output is not defined in the tables of this data sheet. This delay is 3ns typical, and 10ns maximum. Please note that, for cases where highly capacitive lines are being driven, the RC effects of the line may make this delay longer. The delay from a logic transition on a select input to the corresponding CML output is also not defined in the tables. It is 300psec typical, 500psec maximum. For best performance, use good high frequency layout techniques, filter VCC supplies, and keep ground connections short. Use multiple vias where possible. Also, use controlled impedance transmission lines to interface with the SY55859L data inputs and outputs.
RELATED PRODUCT AND SUPPORT DOCUMENTATION
Part Number SY55854U SY55858U Function 2x2 CML Crosspoint Dual 2x2 CML Crosspoint Data Sheet Link www.micrel.com/product-info/products/sy55854u.shtml www.micrel.com/product-info/products/sy55858u.shtml
M9999-110705 hbwhelp@micrel.com or (408) 955-1690
8
Micrel, Inc.
SuperLiteTM SY55859L
32-PIN Micro LEADFRAMETM (MLF-32)
MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131
TEL
USA
+ 1 (408) 944-0800
FAX
+ 1 (408) 474-1000
WEB
http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use. Micrel reserves the right to change circuitry and specifications at any time without notification to the customer. Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale. (c) 2005 Micrel, Incorporated. M9999-110705 hbwhelp@micrel.com or (408) 955-1690
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